2018 IEEE 36th VLSI Test Symposium (VTS 2018)

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2018 IEEE 36th VLSI Test Symposium (VTS 2018)

Website: http://tttc-vts.org/public_html/new/2018/

Place

San Francisco, United States of America

Conference Date

Apr 22 - Apr 25, 2018

Submission Deadline

Oct 20, 2017

Venue

Subjects: Electronics and Electrical Engineering

Sponsorship: 

Indexing: 

Short Description

The VTS Program Committee invites original, unpublished paper submissions for VTS 2018. Paper submissions should be complete manuscripts, up to six pages (inclusive of figures, tables, and bibliography) in a standard IEEE two-column format; papers exceeding the page limit will be returned without review. Authors should clearly explain the significance of the work, highlight novel features, and describe its current status. On the title page, please include: author name(s) and affiliation(s), and the mailing address, phone number, and e-mail address of the contact author. A 50-word abstract and five keywords identifying the topic area are also required.

GENERAL CHAIR
Chen-Huan Chiang
Intel Inc.

PROGRAM CO-CHAIR
Amit Majumdar
Xilinx

PROGRAM CO-CHAIR
M. Tahoori
Karlsruhe Institute of Technology

Contact

E-mail: psong@us.ibm.com

Tel: 

Rank: ★★★★

Indexing

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